10 * See the License for the specific language governing permissions
11 * and limitations under the License.
12 *
13 * When distributing Covered Code, include this CDDL HEADER in each
14 * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
15 * If applicable, add the following below this CDDL HEADER, with the
16 * fields enclosed by brackets "[]" replaced with your own identifying
17 * information: Portions Copyright [yyyy] [name of copyright owner]
18 *
19 * CDDL HEADER END
20 */
21
22 /*
23 * Copyright(c) 2007-2010 Intel Corporation. All rights reserved.
24 */
25
26 /*
27 * Copyright (c) 2008, 2010, Oracle and/or its affiliates. All rights reserved.
28 * Copyright 2012 Nexenta Systems, Inc. All rights reserved.
29 * Copyright 2016 OmniTI Computer Consulting, Inc. All rights reserved.
30 * Copyright (c) 2017, Joyent, Inc.
31 */
32
33 #include "ixgbe_sw.h"
34
35 /*
36 * Update driver private statistics.
37 */
38 static int
39 ixgbe_update_stats(kstat_t *ks, int rw)
40 {
41 ixgbe_t *ixgbe;
42 struct ixgbe_hw *hw;
43 ixgbe_stat_t *ixgbe_ks;
44 int i;
45
46 if (rw == KSTAT_WRITE)
47 return (EACCES);
48
49 ixgbe = (ixgbe_t *)ks->ks_private;
50 ixgbe_ks = (ixgbe_stat_t *)ks->ks_data;
51 hw = &ixgbe->hw;
52
53 mutex_enter(&ixgbe->gen_lock);
54
55 /*
81 for (i = 0; i < ixgbe->num_tx_rings; i++) {
82 ixgbe_ks->tx_overload.value.ui64 +=
83 ixgbe->tx_rings[i].stat_overload;
84 ixgbe_ks->tx_fail_no_tbd.value.ui64 +=
85 ixgbe->tx_rings[i].stat_fail_no_tbd;
86 ixgbe_ks->tx_fail_no_tcb.value.ui64 +=
87 ixgbe->tx_rings[i].stat_fail_no_tcb;
88 ixgbe_ks->tx_fail_dma_bind.value.ui64 +=
89 ixgbe->tx_rings[i].stat_fail_dma_bind;
90 ixgbe_ks->tx_reschedule.value.ui64 +=
91 ixgbe->tx_rings[i].stat_reschedule;
92 ixgbe_ks->tx_break_tbd_limit.value.ui64 +=
93 ixgbe->tx_rings[i].stat_break_tbd_limit;
94 ixgbe_ks->tx_lso_header_fail.value.ui64 +=
95 ixgbe->tx_rings[i].stat_lso_header_fail;
96 }
97
98 /*
99 * Hardware calculated statistics.
100 */
101 ixgbe_ks->gprc.value.ui64 = 0;
102 ixgbe_ks->gptc.value.ui64 = 0;
103 ixgbe_ks->tor.value.ui64 = 0;
104 ixgbe_ks->tot.value.ui64 = 0;
105 for (i = 0; i < 16; i++) {
106 ixgbe_ks->qprc[i].value.ui64 +=
107 IXGBE_READ_REG(hw, IXGBE_QPRC(i));
108 ixgbe_ks->gprc.value.ui64 += ixgbe_ks->qprc[i].value.ui64;
109 ixgbe_ks->qptc[i].value.ui64 +=
110 IXGBE_READ_REG(hw, IXGBE_QPTC(i));
111 ixgbe_ks->gptc.value.ui64 += ixgbe_ks->qptc[i].value.ui64;
112 ixgbe_ks->qbrc[i].value.ui64 +=
113 IXGBE_READ_REG(hw, IXGBE_QBRC(i));
114 ixgbe_ks->tor.value.ui64 += ixgbe_ks->qbrc[i].value.ui64;
115 switch (hw->mac.type) {
116 case ixgbe_mac_82598EB:
117 ixgbe_ks->qbtc[i].value.ui64 +=
118 IXGBE_READ_REG(hw, IXGBE_QBTC(i));
119 break;
120
121 case ixgbe_mac_82599EB:
122 case ixgbe_mac_X540:
123 case ixgbe_mac_X550:
124 case ixgbe_mac_X550EM_x:
125 case ixgbe_mac_X550EM_a:
126 ixgbe_ks->qbtc[i].value.ui64 +=
127 IXGBE_READ_REG(hw, IXGBE_QBTC_L(i));
128 ixgbe_ks->qbtc[i].value.ui64 +=
129 ((uint64_t)((IXGBE_READ_REG(hw,
130 IXGBE_QBTC_H(i))) & 0xF) << 32);
131 break;
132
133 default:
134 break;
135 }
136 ixgbe_ks->tot.value.ui64 += ixgbe_ks->qbtc[i].value.ui64;
137 }
138 /*
139 * This is a Workaround:
140 * Currently h/w GORCH, GOTCH, TORH registers are not
141 * correctly implemented. We found that the values in
142 * these registers are same as those in corresponding
143 * *L registers (i.e. GORCL, GOTCL, and TORL). Here the
144 * gor and got stat data will not be retrieved through
145 * GORC{H/L} and GOTC{H/L} registers but be obtained by
146 * simply assigning tor/tot stat data, so the gor/got
147 * stat data will not be accurate.
148 */
149 ixgbe_ks->gor.value.ui64 = ixgbe_ks->tor.value.ui64;
150 ixgbe_ks->got.value.ui64 = ixgbe_ks->tot.value.ui64;
151
152 ixgbe_ks->prc64.value.ul += IXGBE_READ_REG(hw, IXGBE_PRC64);
153 ixgbe_ks->prc127.value.ul += IXGBE_READ_REG(hw, IXGBE_PRC127);
154 ixgbe_ks->prc255.value.ul += IXGBE_READ_REG(hw, IXGBE_PRC255);
155 ixgbe_ks->prc511.value.ul += IXGBE_READ_REG(hw, IXGBE_PRC511);
156 ixgbe_ks->prc1023.value.ul += IXGBE_READ_REG(hw, IXGBE_PRC1023);
157 ixgbe_ks->prc1522.value.ul += IXGBE_READ_REG(hw, IXGBE_PRC1522);
158 ixgbe_ks->ptc64.value.ul += IXGBE_READ_REG(hw, IXGBE_PTC64);
159 ixgbe_ks->ptc127.value.ul += IXGBE_READ_REG(hw, IXGBE_PTC127);
160 ixgbe_ks->ptc255.value.ul += IXGBE_READ_REG(hw, IXGBE_PTC255);
161 ixgbe_ks->ptc511.value.ul += IXGBE_READ_REG(hw, IXGBE_PTC511);
162 ixgbe_ks->ptc1023.value.ul += IXGBE_READ_REG(hw, IXGBE_PTC1023);
163 ixgbe_ks->ptc1522.value.ul += IXGBE_READ_REG(hw, IXGBE_PTC1522);
164
165 ixgbe_ks->mspdc.value.ui64 += IXGBE_READ_REG(hw, IXGBE_MSPDC);
166 for (i = 0; i < 8; i++)
167 ixgbe_ks->mpc.value.ui64 += IXGBE_READ_REG(hw, IXGBE_MPC(i));
168 ixgbe_ks->mlfc.value.ui64 += IXGBE_READ_REG(hw, IXGBE_MLFC);
169 ixgbe_ks->mrfc.value.ui64 += IXGBE_READ_REG(hw, IXGBE_MRFC);
170 ixgbe_ks->rlec.value.ui64 += IXGBE_READ_REG(hw, IXGBE_RLEC);
171 ixgbe_ks->lxontxc.value.ui64 += IXGBE_READ_REG(hw, IXGBE_LXONTXC);
265 KSTAT_DATA_UINT64);
266 kstat_named_init(&ixgbe_ks->tx_fail_no_tcb, "tx_fail_no_tcb",
267 KSTAT_DATA_UINT64);
268 kstat_named_init(&ixgbe_ks->tx_fail_dma_bind, "tx_fail_dma_bind",
269 KSTAT_DATA_UINT64);
270 kstat_named_init(&ixgbe_ks->tx_reschedule, "tx_reschedule",
271 KSTAT_DATA_UINT64);
272 kstat_named_init(&ixgbe_ks->tx_break_tbd_limit, "tx_break_tbd_limit",
273 KSTAT_DATA_UINT64);
274 kstat_named_init(&ixgbe_ks->tx_lso_header_fail, "tx_lso_header_fail",
275 KSTAT_DATA_UINT64);
276
277 kstat_named_init(&ixgbe_ks->gprc, "good_pkts_recvd",
278 KSTAT_DATA_UINT64);
279 kstat_named_init(&ixgbe_ks->gptc, "good_pkts_xmitd",
280 KSTAT_DATA_UINT64);
281 kstat_named_init(&ixgbe_ks->gor, "good_octets_recvd",
282 KSTAT_DATA_UINT64);
283 kstat_named_init(&ixgbe_ks->got, "good_octets_xmitd",
284 KSTAT_DATA_UINT64);
285 kstat_named_init(&ixgbe_ks->prc64, "pkts_recvd_( 64b)",
286 KSTAT_DATA_UINT64);
287 kstat_named_init(&ixgbe_ks->prc127, "pkts_recvd_( 65- 127b)",
288 KSTAT_DATA_UINT64);
289 kstat_named_init(&ixgbe_ks->prc255, "pkts_recvd_( 127- 255b)",
290 KSTAT_DATA_UINT64);
291 kstat_named_init(&ixgbe_ks->prc511, "pkts_recvd_( 256- 511b)",
292 KSTAT_DATA_UINT64);
293 kstat_named_init(&ixgbe_ks->prc1023, "pkts_recvd_( 511-1023b)",
294 KSTAT_DATA_UINT64);
295 kstat_named_init(&ixgbe_ks->prc1522, "pkts_recvd_(1024-1522b)",
296 KSTAT_DATA_UINT64);
297 kstat_named_init(&ixgbe_ks->ptc64, "pkts_xmitd_( 64b)",
298 KSTAT_DATA_UINT64);
299 kstat_named_init(&ixgbe_ks->ptc127, "pkts_xmitd_( 65- 127b)",
300 KSTAT_DATA_UINT64);
301 kstat_named_init(&ixgbe_ks->ptc255, "pkts_xmitd_( 128- 255b)",
302 KSTAT_DATA_UINT64);
303 kstat_named_init(&ixgbe_ks->ptc511, "pkts_xmitd_( 255- 511b)",
304 KSTAT_DATA_UINT64);
305 kstat_named_init(&ixgbe_ks->ptc1023, "pkts_xmitd_( 512-1023b)",
306 KSTAT_DATA_UINT64);
307 kstat_named_init(&ixgbe_ks->ptc1522, "pkts_xmitd_(1024-1522b)",
308 KSTAT_DATA_UINT64);
309
310 kstat_named_init(&ixgbe_ks->qprc[0], "queue_pkts_recvd [ 0]",
311 KSTAT_DATA_UINT64);
312 kstat_named_init(&ixgbe_ks->qprc[1], "queue_pkts_recvd [ 1]",
313 KSTAT_DATA_UINT64);
314 kstat_named_init(&ixgbe_ks->qprc[2], "queue_pkts_recvd [ 2]",
315 KSTAT_DATA_UINT64);
316 kstat_named_init(&ixgbe_ks->qprc[3], "queue_pkts_recvd [ 3]",
317 KSTAT_DATA_UINT64);
318 kstat_named_init(&ixgbe_ks->qprc[4], "queue_pkts_recvd [ 4]",
319 KSTAT_DATA_UINT64);
320 kstat_named_init(&ixgbe_ks->qprc[5], "queue_pkts_recvd [ 5]",
321 KSTAT_DATA_UINT64);
322 kstat_named_init(&ixgbe_ks->qprc[6], "queue_pkts_recvd [ 6]",
323 KSTAT_DATA_UINT64);
324 kstat_named_init(&ixgbe_ks->qprc[7], "queue_pkts_recvd [ 7]",
325 KSTAT_DATA_UINT64);
326 kstat_named_init(&ixgbe_ks->qprc[8], "queue_pkts_recvd [ 8]",
327 KSTAT_DATA_UINT64);
328 kstat_named_init(&ixgbe_ks->qprc[9], "queue_pkts_recvd [ 9]",
329 KSTAT_DATA_UINT64);
330 kstat_named_init(&ixgbe_ks->qprc[10], "queue_pkts_recvd [10]",
331 KSTAT_DATA_UINT64);
332 kstat_named_init(&ixgbe_ks->qprc[11], "queue_pkts_recvd [11]",
333 KSTAT_DATA_UINT64);
334 kstat_named_init(&ixgbe_ks->qprc[12], "queue_pkts_recvd [12]",
335 KSTAT_DATA_UINT64);
336 kstat_named_init(&ixgbe_ks->qprc[13], "queue_pkts_recvd [13]",
337 KSTAT_DATA_UINT64);
338 kstat_named_init(&ixgbe_ks->qprc[14], "queue_pkts_recvd [14]",
339 KSTAT_DATA_UINT64);
340 kstat_named_init(&ixgbe_ks->qprc[15], "queue_pkts_recvd [15]",
341 KSTAT_DATA_UINT64);
342
343 kstat_named_init(&ixgbe_ks->qptc[0], "queue_pkts_xmitd [ 0]",
344 KSTAT_DATA_UINT64);
345 kstat_named_init(&ixgbe_ks->qptc[1], "queue_pkts_xmitd [ 1]",
346 KSTAT_DATA_UINT64);
347 kstat_named_init(&ixgbe_ks->qptc[2], "queue_pkts_xmitd [ 2]",
348 KSTAT_DATA_UINT64);
349 kstat_named_init(&ixgbe_ks->qptc[3], "queue_pkts_xmitd [ 3]",
350 KSTAT_DATA_UINT64);
351 kstat_named_init(&ixgbe_ks->qptc[4], "queue_pkts_xmitd [ 4]",
352 KSTAT_DATA_UINT64);
353 kstat_named_init(&ixgbe_ks->qptc[5], "queue_pkts_xmitd [ 5]",
354 KSTAT_DATA_UINT64);
355 kstat_named_init(&ixgbe_ks->qptc[6], "queue_pkts_xmitd [ 6]",
356 KSTAT_DATA_UINT64);
357 kstat_named_init(&ixgbe_ks->qptc[7], "queue_pkts_xmitd [ 7]",
358 KSTAT_DATA_UINT64);
359 kstat_named_init(&ixgbe_ks->qptc[8], "queue_pkts_xmitd [ 8]",
360 KSTAT_DATA_UINT64);
361 kstat_named_init(&ixgbe_ks->qptc[9], "queue_pkts_xmitd [ 9]",
362 KSTAT_DATA_UINT64);
363 kstat_named_init(&ixgbe_ks->qptc[10], "queue_pkts_xmitd [10]",
364 KSTAT_DATA_UINT64);
365 kstat_named_init(&ixgbe_ks->qptc[11], "queue_pkts_xmitd [11]",
366 KSTAT_DATA_UINT64);
367 kstat_named_init(&ixgbe_ks->qptc[12], "queue_pkts_xmitd [12]",
368 KSTAT_DATA_UINT64);
369 kstat_named_init(&ixgbe_ks->qptc[13], "queue_pkts_xmitd [13]",
370 KSTAT_DATA_UINT64);
371 kstat_named_init(&ixgbe_ks->qptc[14], "queue_pkts_xmitd [14]",
372 KSTAT_DATA_UINT64);
373 kstat_named_init(&ixgbe_ks->qptc[15], "queue_pkts_xmitd [15]",
374 KSTAT_DATA_UINT64);
375
376 kstat_named_init(&ixgbe_ks->qbrc[0], "queue_bytes_recvd [ 0]",
377 KSTAT_DATA_UINT64);
378 kstat_named_init(&ixgbe_ks->qbrc[1], "queue_bytes_recvd [ 1]",
379 KSTAT_DATA_UINT64);
380 kstat_named_init(&ixgbe_ks->qbrc[2], "queue_bytes_recvd [ 2]",
381 KSTAT_DATA_UINT64);
382 kstat_named_init(&ixgbe_ks->qbrc[3], "queue_bytes_recvd [ 3]",
383 KSTAT_DATA_UINT64);
384 kstat_named_init(&ixgbe_ks->qbrc[4], "queue_bytes_recvd [ 4]",
385 KSTAT_DATA_UINT64);
386 kstat_named_init(&ixgbe_ks->qbrc[5], "queue_bytes_recvd [ 5]",
387 KSTAT_DATA_UINT64);
388 kstat_named_init(&ixgbe_ks->qbrc[6], "queue_bytes_recvd [ 6]",
389 KSTAT_DATA_UINT64);
390 kstat_named_init(&ixgbe_ks->qbrc[7], "queue_bytes_recvd [ 7]",
391 KSTAT_DATA_UINT64);
392 kstat_named_init(&ixgbe_ks->qbrc[8], "queue_bytes_recvd [ 8]",
393 KSTAT_DATA_UINT64);
394 kstat_named_init(&ixgbe_ks->qbrc[9], "queue_bytes_recvd [ 9]",
395 KSTAT_DATA_UINT64);
396 kstat_named_init(&ixgbe_ks->qbrc[10], "queue_bytes_recvd [10]",
397 KSTAT_DATA_UINT64);
398 kstat_named_init(&ixgbe_ks->qbrc[11], "queue_bytes_recvd [11]",
399 KSTAT_DATA_UINT64);
400 kstat_named_init(&ixgbe_ks->qbrc[12], "queue_bytes_recvd [12]",
401 KSTAT_DATA_UINT64);
402 kstat_named_init(&ixgbe_ks->qbrc[13], "queue_bytes_recvd [13]",
403 KSTAT_DATA_UINT64);
404 kstat_named_init(&ixgbe_ks->qbrc[14], "queue_bytes_recvd [14]",
405 KSTAT_DATA_UINT64);
406 kstat_named_init(&ixgbe_ks->qbrc[15], "queue_bytes_recvd [15]",
407 KSTAT_DATA_UINT64);
408
409 kstat_named_init(&ixgbe_ks->qbtc[0], "queue_bytes_xmitd [ 0]",
410 KSTAT_DATA_UINT64);
411 kstat_named_init(&ixgbe_ks->qbtc[1], "queue_bytes_xmitd [ 1]",
412 KSTAT_DATA_UINT64);
413 kstat_named_init(&ixgbe_ks->qbtc[2], "queue_bytes_xmitd [ 2]",
414 KSTAT_DATA_UINT64);
415 kstat_named_init(&ixgbe_ks->qbtc[3], "queue_bytes_xmitd [ 3]",
416 KSTAT_DATA_UINT64);
417 kstat_named_init(&ixgbe_ks->qbtc[4], "queue_bytes_xmitd [ 4]",
418 KSTAT_DATA_UINT64);
419 kstat_named_init(&ixgbe_ks->qbtc[5], "queue_bytes_xmitd [ 5]",
420 KSTAT_DATA_UINT64);
421 kstat_named_init(&ixgbe_ks->qbtc[6], "queue_bytes_xmitd [ 6]",
422 KSTAT_DATA_UINT64);
423 kstat_named_init(&ixgbe_ks->qbtc[7], "queue_bytes_xmitd [ 7]",
424 KSTAT_DATA_UINT64);
425 kstat_named_init(&ixgbe_ks->qbtc[8], "queue_bytes_xmitd [ 8]",
426 KSTAT_DATA_UINT64);
427 kstat_named_init(&ixgbe_ks->qbtc[9], "queue_bytes_xmitd [ 9]",
428 KSTAT_DATA_UINT64);
429 kstat_named_init(&ixgbe_ks->qbtc[10], "queue_bytes_xmitd [10]",
430 KSTAT_DATA_UINT64);
431 kstat_named_init(&ixgbe_ks->qbtc[11], "queue_bytes_xmitd [11]",
432 KSTAT_DATA_UINT64);
433 kstat_named_init(&ixgbe_ks->qbtc[12], "queue_bytes_xmitd [12]",
434 KSTAT_DATA_UINT64);
435 kstat_named_init(&ixgbe_ks->qbtc[13], "queue_bytes_xmitd [13]",
436 KSTAT_DATA_UINT64);
437 kstat_named_init(&ixgbe_ks->qbtc[14], "queue_bytes_xmitd [14]",
438 KSTAT_DATA_UINT64);
439 kstat_named_init(&ixgbe_ks->qbtc[15], "queue_bytes_xmitd [15]",
440 KSTAT_DATA_UINT64);
441
442 kstat_named_init(&ixgbe_ks->mspdc, "mac_short_packet_discard",
443 KSTAT_DATA_UINT64);
444 kstat_named_init(&ixgbe_ks->mpc, "missed_packets",
445 KSTAT_DATA_UINT64);
446 kstat_named_init(&ixgbe_ks->mlfc, "mac_local_fault",
447 KSTAT_DATA_UINT64);
448 kstat_named_init(&ixgbe_ks->mrfc, "mac_remote_fault",
449 KSTAT_DATA_UINT64);
450 kstat_named_init(&ixgbe_ks->rlec, "recv_length_err",
451 KSTAT_DATA_UINT64);
452 kstat_named_init(&ixgbe_ks->lxontxc, "link_xon_xmitd",
453 KSTAT_DATA_UINT64);
454 kstat_named_init(&ixgbe_ks->lxonrxc, "link_xon_recvd",
455 KSTAT_DATA_UINT64);
456 kstat_named_init(&ixgbe_ks->lxofftxc, "link_xoff_xmitd",
457 KSTAT_DATA_UINT64);
458 kstat_named_init(&ixgbe_ks->lxoffrxc, "link_xoff_recvd",
459 KSTAT_DATA_UINT64);
460 kstat_named_init(&ixgbe_ks->ruc, "recv_undersize",
461 KSTAT_DATA_UINT64);
531
532 case MAC_STAT_BRDCSTRCV:
533 ixgbe_ks->bprc.value.ui64 +=
534 IXGBE_READ_REG(hw, IXGBE_BPRC);
535 *val = ixgbe_ks->bprc.value.ui64;
536 break;
537
538 case MAC_STAT_MULTIXMT:
539 ixgbe_ks->mptc.value.ui64 +=
540 IXGBE_READ_REG(hw, IXGBE_MPTC);
541 *val = ixgbe_ks->mptc.value.ui64;
542 break;
543
544 case MAC_STAT_BRDCSTXMT:
545 ixgbe_ks->bptc.value.ui64 +=
546 IXGBE_READ_REG(hw, IXGBE_BPTC);
547 *val = ixgbe_ks->bptc.value.ui64;
548 break;
549
550 case MAC_STAT_NORCVBUF:
551 for (i = 0; i < 8; i++) {
552 ixgbe_ks->rnbc.value.ui64 +=
553 IXGBE_READ_REG(hw, IXGBE_RNBC(i));
554 }
555 *val = ixgbe_ks->rnbc.value.ui64;
556 break;
557
558 case MAC_STAT_IERRORS:
559 ixgbe_ks->crcerrs.value.ui64 +=
560 IXGBE_READ_REG(hw, IXGBE_CRCERRS);
561 ixgbe_ks->illerrc.value.ui64 +=
562 IXGBE_READ_REG(hw, IXGBE_ILLERRC);
563 ixgbe_ks->errbc.value.ui64 +=
564 IXGBE_READ_REG(hw, IXGBE_ERRBC);
565 ixgbe_ks->rlec.value.ui64 +=
566 IXGBE_READ_REG(hw, IXGBE_RLEC);
567 *val = ixgbe_ks->crcerrs.value.ui64 +
568 ixgbe_ks->illerrc.value.ui64 +
569 ixgbe_ks->errbc.value.ui64 +
570 ixgbe_ks->rlec.value.ui64;
571 break;
572
573 case MAC_STAT_RBYTES:
574 ixgbe_ks->tor.value.ui64 = 0;
575 for (i = 0; i < 16; i++) {
576 ixgbe_ks->qbrc[i].value.ui64 +=
577 IXGBE_READ_REG(hw, IXGBE_QBRC(i));
578 ixgbe_ks->tor.value.ui64 +=
579 ixgbe_ks->qbrc[i].value.ui64;
580 }
581 *val = ixgbe_ks->tor.value.ui64;
582 break;
583
584 case MAC_STAT_OBYTES:
585 ixgbe_ks->tot.value.ui64 = 0;
586 for (i = 0; i < 16; i++) {
587 switch (hw->mac.type) {
588 case ixgbe_mac_82598EB:
589 ixgbe_ks->qbtc[i].value.ui64 +=
590 IXGBE_READ_REG(hw, IXGBE_QBTC(i));
591 break;
592
593 case ixgbe_mac_82599EB:
594 case ixgbe_mac_X540:
595 case ixgbe_mac_X550:
596 case ixgbe_mac_X550EM_x:
597 case ixgbe_mac_X550EM_a:
598 ixgbe_ks->qbtc[i].value.ui64 +=
599 IXGBE_READ_REG(hw, IXGBE_QBTC_L(i));
600 ixgbe_ks->qbtc[i].value.ui64 +=
601 ((uint64_t)((IXGBE_READ_REG(hw,
602 IXGBE_QBTC_H(i))) & 0xF) << 32);
603 break;
604
605 default:
606 break;
607 }
608 ixgbe_ks->tot.value.ui64 +=
609 ixgbe_ks->qbtc[i].value.ui64;
610 }
611 *val = ixgbe_ks->tot.value.ui64;
612 break;
613
614 case MAC_STAT_IPACKETS:
615 ixgbe_ks->tpr.value.ui64 +=
616 IXGBE_READ_REG(hw, IXGBE_TPR);
617 *val = ixgbe_ks->tpr.value.ui64;
618 break;
619
620 case MAC_STAT_OPACKETS:
621 ixgbe_ks->tpt.value.ui64 +=
622 IXGBE_READ_REG(hw, IXGBE_TPT);
623 *val = ixgbe_ks->tpt.value.ui64;
624 break;
625
626 /* RFC 1643 stats */
627 case ETHER_STAT_FCS_ERRORS:
628 ixgbe_ks->crcerrs.value.ui64 +=
629 IXGBE_READ_REG(hw, IXGBE_CRCERRS);
630 *val = ixgbe_ks->crcerrs.value.ui64;
|
10 * See the License for the specific language governing permissions
11 * and limitations under the License.
12 *
13 * When distributing Covered Code, include this CDDL HEADER in each
14 * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
15 * If applicable, add the following below this CDDL HEADER, with the
16 * fields enclosed by brackets "[]" replaced with your own identifying
17 * information: Portions Copyright [yyyy] [name of copyright owner]
18 *
19 * CDDL HEADER END
20 */
21
22 /*
23 * Copyright(c) 2007-2010 Intel Corporation. All rights reserved.
24 */
25
26 /*
27 * Copyright (c) 2008, 2010, Oracle and/or its affiliates. All rights reserved.
28 * Copyright 2012 Nexenta Systems, Inc. All rights reserved.
29 * Copyright 2016 OmniTI Computer Consulting, Inc. All rights reserved.
30 * Copyright 2019 Joyent, Inc.
31 */
32
33 #include "ixgbe_sw.h"
34
35 /*
36 * The 82598 controller lacks a high/low register for the various
37 * octet counters, but the common code also lacks a definition for
38 * these older registers. In these cases, the high register address
39 * maps to the appropriate address in the 82598 controller.
40 */
41 #define IXGBE_TOR IXGBE_TORH
42 #define IXGBE_GOTC IXGBE_GOTCH
43 #define IXGBE_GORC IXGBE_GORCH
44
45 /*
46 * Read total octets received.
47 */
48 static uint64_t
49 ixgbe_read_tor_value(const struct ixgbe_hw *hw)
50 {
51 uint64_t tor = 0;
52 uint64_t hi = 0, lo = 0;
53
54 switch (hw->mac.type) {
55 case ixgbe_mac_82598EB:
56 tor = IXGBE_READ_REG(hw, IXGBE_TOR);
57 break;
58
59 default:
60 lo = IXGBE_READ_REG(hw, IXGBE_TORL);
61 hi = IXGBE_READ_REG(hw, IXGBE_TORH) & 0xF;
62 tor = (hi << 32) + lo;
63 break;
64 }
65
66 return (tor);
67 }
68
69 /*
70 * Read queue octets received.
71 */
72 static uint64_t
73 ixgbe_read_qor_value(const struct ixgbe_hw *hw)
74 {
75 uint64_t qor = 0;
76 uint64_t hi = 0, lo = 0;
77
78 switch (hw->mac.type) {
79 case ixgbe_mac_82598EB:
80 qor = IXGBE_READ_REG(hw, IXGBE_QBRC(0));
81 break;
82
83 default:
84 lo = IXGBE_READ_REG(hw, IXGBE_QBRC_L(0));
85 hi = IXGBE_READ_REG(hw, IXGBE_QBRC_H(0)) & 0xF;
86 qor = (hi << 32) + lo;
87 break;
88 }
89
90 return (qor);
91 }
92
93 /*
94 * Read queue octets transmitted.
95 */
96 static uint64_t
97 ixgbe_read_qot_value(const struct ixgbe_hw *hw)
98 {
99 uint64_t qot = 0;
100 uint64_t hi = 0, lo = 0;
101
102 switch (hw->mac.type) {
103 case ixgbe_mac_82598EB:
104 qot = IXGBE_READ_REG(hw, IXGBE_QBTC(0));
105 break;
106
107 default:
108 lo = IXGBE_READ_REG(hw, IXGBE_QBTC_L(0));
109 hi = IXGBE_READ_REG(hw, IXGBE_QBTC_H(0)) & 0xF;
110 qot = (hi << 32) + lo;
111 break;
112 }
113
114 return (qot);
115 }
116
117 /*
118 * Read good octets transmitted.
119 */
120 static uint64_t
121 ixgbe_read_got_value(const struct ixgbe_hw *hw)
122 {
123 uint64_t got = 0;
124 uint64_t hi = 0, lo = 0;
125
126 switch (hw->mac.type) {
127 case ixgbe_mac_82598EB:
128 got = IXGBE_READ_REG(hw, IXGBE_GOTC);
129 break;
130
131 default:
132 lo = IXGBE_READ_REG(hw, IXGBE_GOTCL);
133 hi = IXGBE_READ_REG(hw, IXGBE_GOTCH) & 0xF;
134 got = (hi << 32) + lo;
135 break;
136 }
137
138 return (got);
139 }
140
141 /*
142 * Read good octets received.
143 */
144 static uint64_t
145 ixgbe_read_gor_value(const struct ixgbe_hw *hw)
146 {
147 uint64_t gor = 0;
148 uint64_t hi = 0, lo = 0;
149
150 switch (hw->mac.type) {
151 case ixgbe_mac_82598EB:
152 gor = IXGBE_READ_REG(hw, IXGBE_GORC);
153 break;
154
155 default:
156 lo = IXGBE_READ_REG(hw, IXGBE_GORCL);
157 hi = IXGBE_READ_REG(hw, IXGBE_GORCH) & 0xF;
158 gor = (hi << 32) + lo;
159 break;
160 }
161
162 return (gor);
163 }
164
165 /*
166 * Update driver private statistics.
167 */
168 static int
169 ixgbe_update_stats(kstat_t *ks, int rw)
170 {
171 ixgbe_t *ixgbe;
172 struct ixgbe_hw *hw;
173 ixgbe_stat_t *ixgbe_ks;
174 int i;
175
176 if (rw == KSTAT_WRITE)
177 return (EACCES);
178
179 ixgbe = (ixgbe_t *)ks->ks_private;
180 ixgbe_ks = (ixgbe_stat_t *)ks->ks_data;
181 hw = &ixgbe->hw;
182
183 mutex_enter(&ixgbe->gen_lock);
184
185 /*
211 for (i = 0; i < ixgbe->num_tx_rings; i++) {
212 ixgbe_ks->tx_overload.value.ui64 +=
213 ixgbe->tx_rings[i].stat_overload;
214 ixgbe_ks->tx_fail_no_tbd.value.ui64 +=
215 ixgbe->tx_rings[i].stat_fail_no_tbd;
216 ixgbe_ks->tx_fail_no_tcb.value.ui64 +=
217 ixgbe->tx_rings[i].stat_fail_no_tcb;
218 ixgbe_ks->tx_fail_dma_bind.value.ui64 +=
219 ixgbe->tx_rings[i].stat_fail_dma_bind;
220 ixgbe_ks->tx_reschedule.value.ui64 +=
221 ixgbe->tx_rings[i].stat_reschedule;
222 ixgbe_ks->tx_break_tbd_limit.value.ui64 +=
223 ixgbe->tx_rings[i].stat_break_tbd_limit;
224 ixgbe_ks->tx_lso_header_fail.value.ui64 +=
225 ixgbe->tx_rings[i].stat_lso_header_fail;
226 }
227
228 /*
229 * Hardware calculated statistics.
230 */
231 ixgbe_ks->gprc.value.ui64 += IXGBE_READ_REG(hw, IXGBE_GPRC);
232 ixgbe_ks->gptc.value.ui64 += IXGBE_READ_REG(hw, IXGBE_GPTC);
233 ixgbe_ks->gor.value.ui64 += ixgbe_read_gor_value(hw);
234 ixgbe_ks->got.value.ui64 += ixgbe_read_got_value(hw);
235 ixgbe_ks->qpr.value.ui64 += IXGBE_READ_REG(hw, IXGBE_QPRC(0));
236 ixgbe_ks->qpt.value.ui64 += IXGBE_READ_REG(hw, IXGBE_QPTC(0));
237 ixgbe_ks->qor.value.ui64 += ixgbe_read_qor_value(hw);
238 ixgbe_ks->qot.value.ui64 += ixgbe_read_qot_value(hw);
239 ixgbe_ks->tor.value.ui64 += ixgbe_read_tor_value(hw);
240 ixgbe_ks->tot.value.ui64 = ixgbe_ks->got.value.ui64;
241
242 ixgbe_ks->prc64.value.ul += IXGBE_READ_REG(hw, IXGBE_PRC64);
243 ixgbe_ks->prc127.value.ul += IXGBE_READ_REG(hw, IXGBE_PRC127);
244 ixgbe_ks->prc255.value.ul += IXGBE_READ_REG(hw, IXGBE_PRC255);
245 ixgbe_ks->prc511.value.ul += IXGBE_READ_REG(hw, IXGBE_PRC511);
246 ixgbe_ks->prc1023.value.ul += IXGBE_READ_REG(hw, IXGBE_PRC1023);
247 ixgbe_ks->prc1522.value.ul += IXGBE_READ_REG(hw, IXGBE_PRC1522);
248 ixgbe_ks->ptc64.value.ul += IXGBE_READ_REG(hw, IXGBE_PTC64);
249 ixgbe_ks->ptc127.value.ul += IXGBE_READ_REG(hw, IXGBE_PTC127);
250 ixgbe_ks->ptc255.value.ul += IXGBE_READ_REG(hw, IXGBE_PTC255);
251 ixgbe_ks->ptc511.value.ul += IXGBE_READ_REG(hw, IXGBE_PTC511);
252 ixgbe_ks->ptc1023.value.ul += IXGBE_READ_REG(hw, IXGBE_PTC1023);
253 ixgbe_ks->ptc1522.value.ul += IXGBE_READ_REG(hw, IXGBE_PTC1522);
254
255 ixgbe_ks->mspdc.value.ui64 += IXGBE_READ_REG(hw, IXGBE_MSPDC);
256 for (i = 0; i < 8; i++)
257 ixgbe_ks->mpc.value.ui64 += IXGBE_READ_REG(hw, IXGBE_MPC(i));
258 ixgbe_ks->mlfc.value.ui64 += IXGBE_READ_REG(hw, IXGBE_MLFC);
259 ixgbe_ks->mrfc.value.ui64 += IXGBE_READ_REG(hw, IXGBE_MRFC);
260 ixgbe_ks->rlec.value.ui64 += IXGBE_READ_REG(hw, IXGBE_RLEC);
261 ixgbe_ks->lxontxc.value.ui64 += IXGBE_READ_REG(hw, IXGBE_LXONTXC);
355 KSTAT_DATA_UINT64);
356 kstat_named_init(&ixgbe_ks->tx_fail_no_tcb, "tx_fail_no_tcb",
357 KSTAT_DATA_UINT64);
358 kstat_named_init(&ixgbe_ks->tx_fail_dma_bind, "tx_fail_dma_bind",
359 KSTAT_DATA_UINT64);
360 kstat_named_init(&ixgbe_ks->tx_reschedule, "tx_reschedule",
361 KSTAT_DATA_UINT64);
362 kstat_named_init(&ixgbe_ks->tx_break_tbd_limit, "tx_break_tbd_limit",
363 KSTAT_DATA_UINT64);
364 kstat_named_init(&ixgbe_ks->tx_lso_header_fail, "tx_lso_header_fail",
365 KSTAT_DATA_UINT64);
366
367 kstat_named_init(&ixgbe_ks->gprc, "good_pkts_recvd",
368 KSTAT_DATA_UINT64);
369 kstat_named_init(&ixgbe_ks->gptc, "good_pkts_xmitd",
370 KSTAT_DATA_UINT64);
371 kstat_named_init(&ixgbe_ks->gor, "good_octets_recvd",
372 KSTAT_DATA_UINT64);
373 kstat_named_init(&ixgbe_ks->got, "good_octets_xmitd",
374 KSTAT_DATA_UINT64);
375 kstat_named_init(&ixgbe_ks->qor, "queue_octets_recvd",
376 KSTAT_DATA_UINT64);
377 kstat_named_init(&ixgbe_ks->qot, "queue_octets_xmitd",
378 KSTAT_DATA_UINT64);
379 kstat_named_init(&ixgbe_ks->qpr, "queue_pkts_recvd",
380 KSTAT_DATA_UINT64);
381 kstat_named_init(&ixgbe_ks->qpt, "queue_pkts_xmitd",
382 KSTAT_DATA_UINT64);
383 kstat_named_init(&ixgbe_ks->prc64, "pkts_recvd_( 64b)",
384 KSTAT_DATA_UINT64);
385 kstat_named_init(&ixgbe_ks->prc127, "pkts_recvd_( 65- 127b)",
386 KSTAT_DATA_UINT64);
387 kstat_named_init(&ixgbe_ks->prc255, "pkts_recvd_( 127- 255b)",
388 KSTAT_DATA_UINT64);
389 kstat_named_init(&ixgbe_ks->prc511, "pkts_recvd_( 256- 511b)",
390 KSTAT_DATA_UINT64);
391 kstat_named_init(&ixgbe_ks->prc1023, "pkts_recvd_( 511-1023b)",
392 KSTAT_DATA_UINT64);
393 kstat_named_init(&ixgbe_ks->prc1522, "pkts_recvd_(1024-1522b)",
394 KSTAT_DATA_UINT64);
395 kstat_named_init(&ixgbe_ks->ptc64, "pkts_xmitd_( 64b)",
396 KSTAT_DATA_UINT64);
397 kstat_named_init(&ixgbe_ks->ptc127, "pkts_xmitd_( 65- 127b)",
398 KSTAT_DATA_UINT64);
399 kstat_named_init(&ixgbe_ks->ptc255, "pkts_xmitd_( 128- 255b)",
400 KSTAT_DATA_UINT64);
401 kstat_named_init(&ixgbe_ks->ptc511, "pkts_xmitd_( 255- 511b)",
402 KSTAT_DATA_UINT64);
403 kstat_named_init(&ixgbe_ks->ptc1023, "pkts_xmitd_( 512-1023b)",
404 KSTAT_DATA_UINT64);
405 kstat_named_init(&ixgbe_ks->ptc1522, "pkts_xmitd_(1024-1522b)",
406 KSTAT_DATA_UINT64);
407
408 kstat_named_init(&ixgbe_ks->mspdc, "mac_short_packet_discard",
409 KSTAT_DATA_UINT64);
410 kstat_named_init(&ixgbe_ks->mpc, "missed_packets",
411 KSTAT_DATA_UINT64);
412 kstat_named_init(&ixgbe_ks->mlfc, "mac_local_fault",
413 KSTAT_DATA_UINT64);
414 kstat_named_init(&ixgbe_ks->mrfc, "mac_remote_fault",
415 KSTAT_DATA_UINT64);
416 kstat_named_init(&ixgbe_ks->rlec, "recv_length_err",
417 KSTAT_DATA_UINT64);
418 kstat_named_init(&ixgbe_ks->lxontxc, "link_xon_xmitd",
419 KSTAT_DATA_UINT64);
420 kstat_named_init(&ixgbe_ks->lxonrxc, "link_xon_recvd",
421 KSTAT_DATA_UINT64);
422 kstat_named_init(&ixgbe_ks->lxofftxc, "link_xoff_xmitd",
423 KSTAT_DATA_UINT64);
424 kstat_named_init(&ixgbe_ks->lxoffrxc, "link_xoff_recvd",
425 KSTAT_DATA_UINT64);
426 kstat_named_init(&ixgbe_ks->ruc, "recv_undersize",
427 KSTAT_DATA_UINT64);
497
498 case MAC_STAT_BRDCSTRCV:
499 ixgbe_ks->bprc.value.ui64 +=
500 IXGBE_READ_REG(hw, IXGBE_BPRC);
501 *val = ixgbe_ks->bprc.value.ui64;
502 break;
503
504 case MAC_STAT_MULTIXMT:
505 ixgbe_ks->mptc.value.ui64 +=
506 IXGBE_READ_REG(hw, IXGBE_MPTC);
507 *val = ixgbe_ks->mptc.value.ui64;
508 break;
509
510 case MAC_STAT_BRDCSTXMT:
511 ixgbe_ks->bptc.value.ui64 +=
512 IXGBE_READ_REG(hw, IXGBE_BPTC);
513 *val = ixgbe_ks->bptc.value.ui64;
514 break;
515
516 case MAC_STAT_NORCVBUF:
517 /*
518 * The QPRDC[0] register maps to the same kstat as the
519 * old RNBC register because they have equivalent
520 * semantics.
521 */
522 if (hw->mac.type == ixgbe_mac_82598EB) {
523 for (i = 0; i < 8; i++) {
524 ixgbe_ks->rnbc.value.ui64 +=
525 IXGBE_READ_REG(hw, IXGBE_RNBC(i));
526 }
527 } else {
528 ixgbe_ks->rnbc.value.ui64 +=
529 IXGBE_READ_REG(hw, IXGBE_QPRDC(0));
530 }
531
532 *val = ixgbe_ks->rnbc.value.ui64;
533 break;
534
535 case MAC_STAT_IERRORS:
536 ixgbe_ks->crcerrs.value.ui64 +=
537 IXGBE_READ_REG(hw, IXGBE_CRCERRS);
538 ixgbe_ks->illerrc.value.ui64 +=
539 IXGBE_READ_REG(hw, IXGBE_ILLERRC);
540 ixgbe_ks->errbc.value.ui64 +=
541 IXGBE_READ_REG(hw, IXGBE_ERRBC);
542 ixgbe_ks->rlec.value.ui64 +=
543 IXGBE_READ_REG(hw, IXGBE_RLEC);
544 *val = ixgbe_ks->crcerrs.value.ui64 +
545 ixgbe_ks->illerrc.value.ui64 +
546 ixgbe_ks->errbc.value.ui64 +
547 ixgbe_ks->rlec.value.ui64;
548 break;
549
550 case MAC_STAT_RBYTES:
551 ixgbe_ks->tor.value.ui64 += ixgbe_read_tor_value(hw);
552 *val = ixgbe_ks->tor.value.ui64;
553 break;
554
555 case MAC_STAT_OBYTES:
556 /*
557 * The controller does not provide a Total Octets
558 * Transmitted statistic. The closest thing we have is
559 * Good Octets Transmitted. This makes sense, as what
560 * does it mean to transmit a packet if it didn't
561 * actually transmit.
562 */
563 ixgbe_ks->got.value.ui64 += ixgbe_read_got_value(hw);
564 ixgbe_ks->tot.value.ui64 = ixgbe_ks->got.value.ui64;
565 *val = ixgbe_ks->tot.value.ui64;
566 break;
567
568 case MAC_STAT_IPACKETS:
569 ixgbe_ks->tpr.value.ui64 +=
570 IXGBE_READ_REG(hw, IXGBE_TPR);
571 *val = ixgbe_ks->tpr.value.ui64;
572 break;
573
574 case MAC_STAT_OPACKETS:
575 ixgbe_ks->tpt.value.ui64 +=
576 IXGBE_READ_REG(hw, IXGBE_TPT);
577 *val = ixgbe_ks->tpt.value.ui64;
578 break;
579
580 /* RFC 1643 stats */
581 case ETHER_STAT_FCS_ERRORS:
582 ixgbe_ks->crcerrs.value.ui64 +=
583 IXGBE_READ_REG(hw, IXGBE_CRCERRS);
584 *val = ixgbe_ks->crcerrs.value.ui64;
|